Register control system and method

ABSTRACT

A mark discriminator circuit for a plural station web apparatus wherein marks are cyclically applied in line on a web at successive stations, and a scanner produces a series of scanner pulses in each repeat interval, the circuit being operable to respond to a pair of such scanner pulses whose spacing is a measure of a registration condition of the web.

United States Patent Inventor Jay C. Roote Danville, Ill. Appl. No.873,048 Filed Oct. 31, I969 Patented Nov. 30, 1971 Assignee l-lurletronIncorporated Danville, Ill.

REGISTER CONTROL SYSTEM AND METHOD 15 Claims, 3 Drawing Figs.

US. Cl 235/61. R, 235/92 R, 226/28, 340/259, 101/184 Int. Cl B41t9/02,B65h 23/22 Field 01 Search 226/2, 27,

28,45, 100; 340/259; 101/181, 183, 184; 235/6111, 92 MP; 250/219 DR [56]References Cited UNITED STATES PATENTS 3,031,118 4/1962 Frommer 226/283,068,787 12/1962 DallOglio et a1... 226/28 3,191,530 6/1965 Fath etal101/184 Primary ExaminerThomas A. Robinson Attorney-Hill, Sherman,Meroni, Gross & Simpson ABSTRACT: A mark discriminator circuit for aplural station web apparatus wherein marks are cyclically applied inline on a web at successive stations, and a scanner produces a series ofscanner pulses in each repeat interval, the circuit being operable torespond to a pair of such scanner pulses whose spacing is a measure ofaregistration condition of the web.

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W65 awe wo/ac game: o/sewr era aw REGISTER CONTROL SYSTEM AND METHODSUMMARY OF THE INVENTION This invention relates to a plural station webapparatus and particularly to a mark discriminator circuit for receivinga series of scanner pulses produced by scanning of respective marks on aweb and for responding to a pair of such scanner pulses whose spacingprovides a measure of a registration condition of the web.

It is an object of the present invention to provide a novel system andmethod for sensing a register condition of a web.

Another object of the invention is to provide a plural station webapparatus wherein the sensing of the register condition of the web ateach station can be carried out without the need for a position detectoror similar signal generator mechanically driven in step with thecyclical operation at the station.

A further object of the invention is to provide a plural station webapparatus wherein a single scanner together with a mark discriminatorcircuit provides a pair pulses whose spacing is a measure of a registercondition of the web.

A still further object of the invention resides in the provision of aplural station web apparatus wherein setup is accomplished by theadjustment of electrical switch means to select a desired pair of markson the web irrespective of their positions is a series of marks producedby the successive stations.

A more general object of the invention relates to the provision of ahighly flexible web register sensing system and method capable ofeconomical implementation and of convenient installation with a minimumexpenditure of time and effort.

Other objects, features and advantages of the invention will be readilyapparent from the following description of a preferred embodimentthereof, taken in conjunction with the accompanying drawings, althoughvariations and modifications may be effected without departing from thespirit and scope of the novel concepts of the disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagrammatic indication ofa plural station web apparatus in accordance with the present invention;

FIG. 2 is a circuit diagram showing a preferred mark discriminatorsystem in accordance with the present invention; and

FIG. 3 is a wave form diagram useful in explaining the operation of thesystem of FIG. 2, and includes FIGS. 3A-3L.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 illustrates amultistation printing apparatus wherein a web moves in the directionindicated by arrow 11 past a succession of printing stations such asindicated at A, B, C and D. Printing cylinders such as represented at12-15 are driven from line shaft diagrammatically indicated at 16. Alsodriven by the line shaft is a rotary encoder device 17 which may, forexample, supply a total of 30,000 encoder pulses for each revolution ofthe cylinders 12-15. Since the web in driven essentially in step withthe rotary motion of the cylinders 12-15, the successive encoder pulsesrepresent successive uniform increments of movement of the web.

Considering the station D, for example, a circumferential webregistration control device may act on the web at the region indicatedat 20. In accordance with the present invention, each of the stations A,B, C and D may print a mark on a common channel or gutter on a givenside of the web 10, and a suitable scanner 22 may be arranged to scanthe marks on the channel and to provide a series of scanner pulses inresponse to the successive marks on the web at each repeat intervaltherealong. In a typical system of this type the marks printed by thesuccessive stations A-D can appear in any random order. Thus referringto FIG. 3A, the first pulse of each series from scanner 22 may beproduced by a mark printed at station A, the second pulse may beproduced by a mark at station C,

the third pulse may be produced by the mark printed at station D and thefourth pulse of the series may result from a mark printed at station Bin FIG. 1. For the sake of example, it may be desired to compare themarks printed by stations C and D as a measure of the registrationcondition at station P. The mark printed at station C is applied inadvance of the control point indicated at 20, and may be considered thecontrolled mark, while the mark printed by station D will serve as areference mark representing the operation of cylinder 15 at station D.

FIG. 2 illustrates a preferred mark discriminator circuit for receivingthe series of pulses such as indicated at 25-28 at input line 30 and forresponding to a desired pair of such pulses such as pulses 26 and 27,for example, Since the marks are applied at the respective stations ineach cycle of operation, that is in each revolution of the cylinders12-15, the scanner 22 will provide successive series of pulses such asthe pulses 25-28 followed by a further series of pulses such asindicated at 25'-28 at input line 30. For example the scanner pulses 25and 25' would represent the successive pulses at the scanner 22 producedin response to the successive marks applied by cylinder 12, while thescanner pulses 26 and 26 would be produced by the successive marksprinted by cylinder 14 at station C, and so forth.

Referring to FIGS. 1 and 2, the electrical output from scanner 22 isshown as being connected via conductor 30 with a series of conductors31-34 in FIG. 2, while electrical conductor 35 leading from encoder 17is shown as being connected to the input ofa counter component 36 of thecircuit of FIG. 2.

FIG. 2 shows a scanner pulse circuit including shift register 40,selector switches 41 and 42 and logical circuitry including gates 43-46and D-type flip-flop 47 for supplying a first output signal at line 48in response to the first selected scanner pulse and for supplying anoutput signal at line 49 in response to the second selected scannerpulse. The scanner pulse circuit further includes reset means includingcounter 36, gates 51 and 52 and D-type flip-flop 53.

The shift register 40 includes successive stages 55, 56 and 57 havingrespective Q output conductors 62-64 connected to terminals numbered 2,3 and 4, respectively of the switches 41 and 42. In the illustratescircuit, stages 55-57 are considered to be initially in a reset orlogical zero condition wherein, for example, the output lines 62-64 areat ground potential. As represented at 66 in FIG. 3B, the trailing edgeof the first pulse 25 in normal operation will serve to set stage 55 tothe logical one or set condition in which condition output line 62 maybe at a predetermined positive potential such as represented by thesymbol +V on the drawings. Thus with stage 55 activated the .l input ofstage 56 is at the predetermined positive potential and the K input ofstage 56 is at ground potential, conditioning the stage 56 to respond tothe next input pulse 26. The change of state of the second stage 56 isresponse to the trailing edge of scanner pulse 26 is indicated at 67 inFIG. 3C. Similarly the third scanner at 27 oat its trailing edge willproduce the change of state indicated at 68 for output conductor 64 ofthe third stage 57. In the illustrated embodiment, the fourth pulse 28willhave no effect on the condition of the shift register 40 since eachof the stages 55-57 is already in the activated condition.

With the selector switches 41 and 42 in positions number 2 and number 3,respectively as shown in FIG. 2, the setting of the first stage 55 ofshift register 40 as represented at 66 in FIG. 38 will result in thetransmission of the predetermined positive potential via switch 41 toone input of Nand-gates 43 and 45. The result is a ground potentialoutput from gate 45 and a predetermined positive potential output asindicated at 70, FIG. 3E from gate 46, conditioning the D-type flip-flop47 to respond to the next scanner pulse 26 which is transmitted to theclock input of flip-flop 47 via conductors 30 and 34. Thus asrepresented at wave form 71 in FIG. 3F, the 0 output of flip-flop 47provides an output signal 71 in response to the first selected pulse ofthe series 25-28. Similarly, for the illustrated embodiment, withselector switch 42 in the number 3 position,

the activation of the second stage 56 supplies a predetermined positivepotential to output conductor 63 which is connected to the second inputof gate 43, driving the output of gate 43 to ground potential, anddriving the outputs of gates 44 and 45 to the predetermined positivepotential. Thus the output of gate 46 shifts to ground potential, andflip-flop 47 responds to pulse 27 to provide an output signal in theform of a negative transition as indicated at 72 in FIG. 3F at outputconductor 48.

The positive transition at output conductor 48 causes the D- typeflip-flop 53 to assume a logical l-condition. The transition at outputconductor 74 of flip-flop 53 (the Q complement output) is represented at75 in FIG. 3H. (The transition at the Q output of flip-flop 53 isindicated at 76 in FIG. 36.)

Conductor 74 is connected to a control terminal of binary counter 36such that when the potential of conductor 74 is at the ground potentiallevel, the counter is released and begins counting encoder pulsessupplied at input line 35. By way of example, conductor 80 may beconnected to the output of the l l binary stage of counter 36 so as toprovide a predetermined positive potential when this stage is in alogical l-condition whiie output conductor 81 may be connected with theoutput of the binary stage of the counter so as to provide apredetermined positive potential when this stage is in a logicalI-condition. FIG. 3I represents toe potential at output conductor 80,while FIG. 3] represents the output potential at conductor 81. Thus, forexample, transition 82 occurs 1024 encoder pulses after the transition75, while transition 83 occurs at a count of 16384 encoder pulses afterthe transition 75. At the instant that conductor 8! is exhibiting thetransition 83, conductor 80 will be exhibiting a potential transition asindicated at 84 in FIG. 3i. After a further 1024 encoder pulses, outputconductor 80 will shift to a predetermined positive potential asindicated at 85 in FIG. 3]. The positive potentials at conductors 80 and81 provide a ground potential output from gate 52, causing the clearingof fiip-fiop 53. The return of conductor 74 to a high or positivepotential as indicated at 86 serves to set the binary counter 36 to itsinitial count of zero and hold the counter in this state. The output ofgate 52 in indicated at 87 in FIG. 3K. FIG. 31. indicates the output ofgate 51 which serves to reset the shift register 40 and flip-flop 47during the interval indicated at 88 in FIG. 3L.

The circuit of FIG. 2 further includes control pulse transmission meansfor coupling the output of the scanner pulse circuit to a web controland/or error display system such as represented by component 90. By wayof example, the component 90 may correspond to the system disclosed in acopending application SER. NO. 722,095 filed Apr. I7, 1968, and assignedto the same assignee as the present application. For the sake of thisparticular example, a one shot" circuit is indicated at 91 having itsinput connected to conductor 48 for transmitting a first control pulseto the system 90 which may correspond to the position detector signal(which is supplied to a conductor number 44 in the fourth figure of thecopending application). Similarly a one shot" circuit 92 is shown ashaving its input connected to the conductor 49 so as to supply a secondcontrol pulse to the system 90 (which may correspond to the scannerpulse supplied to conductor number 56 shown in the fourth figure of saidcopending application). In this event, the system 90 may control acompensator motor acting at the region in FIG. 1 (and corresponding tothe compensator device indicated for station D in the first figure ofthe copending application).

It will be apparent to those skilled in the art from a consideration ofthe drawings that the position of the selector switch 41 may determinethe position number of either the first or second scanner pulse which isresponded to by the circuit of FIG. 2, while the position number of thesecond selector switch 42 may determine the position number of the otherscanner pulse of the series which is responded to by the circuit of FIG.2.

If stations A D print with yellow, red, blue and black ink,respectively. it will be understood that selector switch 41 may be setby the operator to the position of the blue mark in the series of markson a web, while the selector switch 42 may be set to the position of theblack mark of the web, irrespective of which appears first, thus greatlysimplifying the setup procedure from the standpoint of the operator.

It will also be apparent to those skilled in the art from aconsideration of the drawings that if when the system is initiallystarted up, the first pulse appearing at input 30 is different pulsethan the first pulse of the series, the operation of the circuit is suchthat after a few cycles of operation, normal operation willautomatically be achieved. Similarly if a spurious scanner pulse shouldbe produced during normal operation, for example as a result of inkinadvertently dropping on the web or a defect in the web, the resultwould be only a momentary loss of synchronisrn, and the circuit wouldautomatically restore proper operation after a few cycles. In order forthe illustrated system to be capable of automatic start up and automaticresynchronization, there should be a clear track for approximately onehalf the repeat length in advance of the desired series of markscorresponding to pulses 25-28. If the required clear track in notavailable, resort can be had to electronic or mechanical gatingtechniques to maintain synchronization. It will be observed however thatspurious pulses following pulse 28 and prior to the resetting of theshift register 40 as represented at 88 in FIG. 31.. will have no adverseefiect on the system since shift register 40 will not respond to pulsesduring this interval.

For the sake of a specific example, the J K flip-flop 55-57 may be typeS N 7473 available from Texas Instruments Incorporated, and the type Dflip-flops 747 and 53 may be type S N 7474 of the same company. It isbelieved evident that one skilled in the art can readily provide abinary counter meeting the requirements for the counter 36.

SUMMARY OF OPERATION In setting up the system, the operator may adjustthe selector switch 41 to a position corresponding to the position ofthe mark printed by station C, FIG. I (for example the blue mark), whilethe selector switch 42 may be set to a position corresponding to theposition of the mark printed by the station D on the web (for examplethe black mark). Thus, if the sequence of marks on the web were black,red, yellow, and blue, for example, selector switch 41 would be set toposition number four, while selector switch 42 would be set to positionnumber one. Thus setup is an extremely simple matter from the standpointof the operator.

Once stable operation of the system has been achieved, whichautomatically occurs regardless of the startup point, after a fewcycles, the sequence of operation of the circuitry is as represented inFIG. 3 for the positions of the selector switches 41 and 42 as shown inFIG. 2. In each cycle of operation, a positive going transition 7]occurs at output line 48 at the position of the pulse selected by switch41, and a positive going transition occurs at output line 49(corresponding in time to transition 72 in FIG. 3F) in response to thesecond selected pulse as determined by the position of selector switch42. As indicated by components 91 and 92, these transitions or outputsignals may be utilized to generate first and second control pulses atthe input to the system whose spacing is a measure of the registercondition at the station D, FIG. 1. The system 90 may apply correctionsat region 20, FIG. 1, should the spacing between the control pulsessignify an error in the register condition at the station. By properlysetting up the system, it is a very simple matter for the operator toinsure that the control corrections applied at region 20 will be in thedirection to reduce any registration error, should the present inventionbe utilized to control the register condition.

It should be emphasized that while the illustrated system ispreferredand uniquely advantageous in certain applications such asrotogravure offset printing of newspapers and the like, certainsimplifications of the illustrated circuit will be possible particularlyfor applications where the position of the mark printed by one of thestations can be conveniently predetermined, for example. It will furtherbe evident that the invention is applicable to web apparatus havingdifferent numbers of stations than the apparatus specificallyillustrated, and the application of the concepts of the invention todifferent numbers of marks in a common channel will be apparent to thoseskilled in the art from the foregoing disclosure.

It will be apparent that many other modifications and variations may beaffected without departing from the scope of the novel concepts of thepresent invention.

1 claim as my invention:

1. A plural station web system wherein marks are cyclically applied inline on a web at successive stations, and wherein scanning of the marksfor sensing the registration condition of the web at a given stationproduces a series of successive scanner pulses in each repeat interval,said system comprising a scanner pulse circuit for receiving said seriesof scanner pulses including at least three successive scanner pulses ineach repeat interval and for responding to a selected pair of saidscanner pulses to provide respective output signals, and

control pulse transmission means connected to said scanner pulse circuitand responsive to the output signals therefrom produced by said pair ofscanner pulses to provide a pair of control pulses whose spacing is ameasure of the register condition of the web at the given station.

2. A system according to claim 1 with said scanner circuit includingselector switch means having respective switching positionscorresponding to successive scanner pulse positions in the series, saidswitch means being adjustable to condition said scanner pulse circuit torespond to a selected pair of said scanner pulses pertinent to theregistration condition at the given station.

3. A system according to claim 2 with said selector switch means beingoperable to condition said scanner pulse circuit to respond to any pulseof said series as representing a pertinent mark applied to the web inadvance of the given station and select any other pulse of said seriesas representing the mark applied to the web at the given station.

4. A system according to claim 1 with scanner pulse circuit comprisingreset means for responding to encoder pulses produced by uniformincrements of movement of the web and automatically operable tocyclically reset the scanner pulse circuit to an initial condition atintervals related to the speed of movement of the web past the stationthereby to enable repeated sampling of the registration condition of theweb at said station.

5. A system according to claim 1 with said scanner pulse circuitcomprising scanner pulse responsive means shiftable from an initialcondition to a succession of further conditions in response tosuccessive scanner pulses of the series, and reset means for cyclicallyrestoring said pulse responsive means to said initial condition inadvance of receipt of each series of said scanner pulses.

6. A system according to claim 5 with said pulse responsive meanscomprising a shift register wherein successive stages are actuated inresponse to successive pulses until all stages have been actuated, eachstage remaining in actuated condition until reset to initial condition,and said shift register after receipt of a predetermined number ofpulses being nonresponsive to any further pulses received prior toresetting of the shift register to the initial condition.

7. A system according to claim 6 with said reset means comprising acounter circuit including a counter responsive to encoder pulsesproduced by uniform increments of movement of the web, said countercircuit being operative when the counter reaches a predetermined countvalue to reset the shift register to said initial condition and to resetsaid counter to an initial count, said counter circuit being inherentlyoperable to place said scanner pulse circuit in proper operatingcondition irrespective of which scanner pulse of the series is firstreceived by the scanner pulse circuit at initial startup of the system.

8. A mark discriminator system for a web having a series of marks ateach successive repeat length therealong including one marksubstantially representing a reference position on the web and a secondmark whose position relative to the one mark is a function ofregistration condition of the web at a given station, said systemcomprising input means for receiving scanner pulses which are responsiveto the scanning of the respective marks on the web, a scanner pulsecircuit connected to said input means to receive a series of scannerpulses in each repeat interval, said circuit comprising digital logicmeans assuming successive conditions in response to the successivescanner pulses of the series and selectively adjustable to transmitrespective output signals in response to the respective scanner pulsescorresponding to said one mark and to said second mark, the outputsignals thereby providing a measure of the register condition of theweb.

9. A system in accordance with claim 8 with said digital logic meansbeing resettable to an initial condition and being responsive tosuccessive scanner pulses thereafter received up to a predeterminedmaximum number of scanner pulses, but being nonresponsive to scannerpulses in excess of said predetermined maximum number until reset tosaid initial condition.

10. A system in accordance with claim 9 further comprising a countercircuit for counting encoder pulses produced by uniform increments ofmovement of the web and operable in response to a first of said outputsignals to begin a counting cycle and operable upon reaching apredetermined count which predetermined count is reached after a timeinterval which is greater than the time interval between said outputsignals, to reset said digital logic means to said initial condition,said counter circuit being inherently operable to place said digitallogic means in proper operating condition irrespective of which scannerpulse of said series received by said scanner pulse circuit at initialstartup of the system.

11. In a plural station web system wherein first, second, third andfourth marks are cyclically applied in line on a common channel of a webat respective first, second, third and fourth stations, and whereinscanning of the marks for sensing the registration condition of the webproduces first, second, third and fourth scanner pulses in each ofsuccessive repeat intervals, the improvement comprising one and only onescanner at said fourth station for scanning only a single line of markson the web and operable for scanning said first, second, third andfourth marks on said common channel of the web in a repeat length of theweb to produce a series of scanner pulses in a repeat intervalcorresponding to scanning of a repeat length of the web, said seriesincluding said first, second, third and fourth scanner pulses,

a scanner pulse circuit connected with said scanner to receive saidseries of scanner pulses therefrom in each re peat interval with thefirst, second, third and fourth scanner pulses occurring in the sameorder in each repeat interval, said scanner pulse circuit beingresponsive to the successive scanner pulses of said series in eachrepeat interval to assume respective difierent logical switchingconditions with respective first, second, third and fourth logicalswitching conditions corresponding to respective time intervals for theoccurrence of the first, second, third and fourth scanner pulses,respectively, in each repeat interval, and

said scanner pulse circuit comprising a pair of four position selectionmeans each for selectively producing an output signal in response to ascanner occurring selectively during said first, second, third andfourth logical switching conditions, said selection means beingselectively settable to produce output signals in response to any two ofsaid series of scanner pulses in each repeat interval, and thereby beingoperable regardless of the order of occurrence of said first, second,third and fourth scanner pulses to generate a pair of output signals ineach repeat interval corresponding respectively to the time ofoccurrence of one of said first, second and third scanner pulses and tothe time of occurrence of said fourth scanner pulse, with the timeinterval between said pair of output signals in each repeat intervalthereby representing the status of the register condition at said fourthstation in the corresponding repeat length of the web.

12. In a plural station web system wherein first, second and third marksare cyclically applied in line on a common channel of a web atrespective first, second and third stations, and wherein scanning of themarks at a fourth station for sensing 10 the register condition of theweb produces at least first, second and third scanner pulses in each ofsuccessive repeat intervals,

the improvement comprising one and only 'one scanner at said fourthstation for scanning only a single line of marks on the web and operablefor scanning said first, second and third marks on said common channelof the web in a repeat length of the web to produce a series of scannerpulses in a repeat interval corresponding to scanning of a repeat lengthof the web, said series including at least said first, second and thirdscanner pulses.

a scanner pulse circuit connected with said scanner to receive saidseries of scanner pulses therefrom in each repeat interval with thefirst, second and third scanner pulses occurring in the same order ineach repeat interval, said scanner pulse circuit being responsive to thesuccessive scanner pulses of said series in each repeat interval toassume respective different logical switching conditions with respectivefirst, second and third logical switching conditions corresponding torespective time intervals for the occurrence of the first, second andthird scanner pulses, respectively, in each repeat interval,

said scanner pulse circuit comprising a multiple position selectionmeans for selectively producing an output signal in response to ascanner pulse occurring selectively at least during said first, secondand third logical switching conditions, said multiple position selectionmeans being selectively settable to produce a first output signal inresponse to any of said first, second and third scanner pulses in eachrepeat interval, said scanner pulse circuit comprising further means forproducing a second output signal synchronized with a web operation atsaid fourth station, and said scanner pulse circuit including saidmultiple position selection means and said further means being operableregardless of the order of said first, second and third scanner pulsesto generate first and second output signals in each repeat intervalcorresponding respectively to the time of occurrence of one of saidfirst, second and third scanner pulses and to the time of occurrence ofthe web operation at the fourth station, with the time interval betweensaid first and second output signals in each repeat interval therebyrepresenting the status of the register condition at said fourth stationin the corresponding repeat length of the web,

13. In a plural station web system in accordance with claim 12, theimprovement further comprising a digital logic circuit resettable to aninitial logical switching condition and being responsive to successivescanner pulses thereafter received up to a predetermined maximum numberof scanner pulses, but being nonresponsive to scanner pulses in excessof said predetermined maximum number until reset to said initial logicalswitching condition.

14. In a plural station web system in accordance with claim 13, theimprovement further comprising a counter circuit for counting encoderpulses produced by uniform increments of movement of the web andoperable in response to one of said first and second output signals tobegin a counting cycle and operable upon reaching a predetermined countwhich predetermined count is reached after a time interval which isgreater than the time interval between said first and second outputsignals, to reset said digital logic circuit to said initial logicalswitchin condition, said counter circuit being inherently operab e toplace said digital logic circuit in proper synchronism with said seriesof scanner pulses irrespective of which scanner pulse of the series isfirst received at initial startup of the system 15. The method ofsensing web registration at a given station which comprises applyingmarks to a channel of the web at repeat intervals therealong such that ascanner scanning the channel on the web produces a series of at leastthree scanner pulses for each repeat interval including a pair of pulseswhose spacing is a function of register condition, and selectivelyresponding to the pair of scanner pulses to transmit an output signal asa measure of the register condition of the web.

1. A plural station web system wherein marks are cyclically applied inline on a web at successive stations, and wherein scanning of the marksfor sensing the registration condition of the web at a given stationproduces a series of successive scanner pulses in each repeat interval,said system comprising a scanner pulse circuit for receiving said seriesof scanner pulses including at least three successive scanner pulses ineach repeat interval and for responding to a selected pair of saidscanner pulses to provide respective output signals, and control pulsetransmission means connected to said scanner pulse circuit andresponsive to the output signals therefrom produced by said pair ofscanner pulses to provide a pair of control pulses whose spacing is ameasure of the register condition of the web at the given station.
 2. Asystem according to claim 1 with said scanner pulse circuit includingselector switch means having respective switching positionscorresponding to successive scanner pulse positions in the series, saidswitch means being adjustable to condition said scanner pulse circuit torespond to a selected pair of said scanner pulses pertinent to theregistration condition at the given station.
 3. A system according toclaim 2 with said selector switch means being operable to condition saidscanner pulse circuit to respond to any pulse of said series asrepresenting a pertinent maRk applied to the web in advance of the givenstation and select any other pulse of said series as representing themark applied to the web at the given station.
 4. A system according toclaim 1 with said scanner pulse circuit comprising reset means forresponding to encoder pulses produced by uniform increments of movementof the web and automatically operable to cyclically reset the scannerpulse circuit to an initial condition at intervals related to the speedof movement of the web past the station thereby to enable repeatedsampling of the registration condition of the web at said station.
 5. Asystem according to claim 1 with said scanner pulse circuit comprisingscanner pulse responsive means shiftable from an initial condition to asuccession of further conditions in response to successive scannerpulses of the series, and reset means for cyclically restoring saidpulse responsive means to said initial condition in advance of receiptof each series of said scanner pulses.
 6. A system according to claim 5with said pulse responsive means comprising a shift register whereinsuccessive stages are actuated in response to successive pulses untilall stages have been actuated, each stage remaining in actuatedcondition until reset to initial condition, and said shift registerafter receipt of a predetermined number of pulses being nonresponsive toany further pulses received prior to resetting of the shift register tothe initial condition.
 7. A system according to claim 6 with said resetmeans comprising a counter circuit including a counter responsive toencoder pulses produced by uniform increments of movement of the web,said counter circuit being operative when the counter reaches apredetermined count value to reset the shift register to said initialcondition and to reset said counter to an initial count, said countercircuit being inherently operable to place said scanner pulse circuit inproper operating condition irrespective of which scanner pulse of theseries is first received by the scanner pulse circuit at initial startup of the system.
 8. A mark discriminator system for a web having aseries of marks at each successive repeat length therealong includingone mark substantially representing a reference position on the web anda second mark whose position relative to the one mark is a function ofregistration condition of the web at a given station, said systemcomprising input means for receiving scanner pulses which are responsiveto the scanning of the respective marks on the web, a scanner pulsecircuit connected to said input means to receive a series of scannerpulses in each repeat interval, said circuit comprising digital logicmeans assuming successive conditions in response to the successivescanner pulses of the series and selectively adjustable to transmitrespective output signals in response to the respective scanner pulsescorresponding to said one mark and to said second mark, the outputsignals thereby providing a measure of the register condition of theweb.
 9. A system in accordance with claim 8 with said digital logicmeans being resettable to an initial condition and being responsive tosuccessive scanner pulses thereafter received up to a predeterminedmaximum number of scanner pulses, but being nonresponsive to scannerpulses in excess of said predetermined maximum number until reset tosaid initial condition.
 10. A system in accordance with claim 9 furthercomprising a counter circuit for counting encoder pulses produced byuniform increments of movement of the web and operable in response to afirst of said output signals to begin a counting cycle and operable uponreaching a predetermined count which predetermined count is reachedafter a time interval which is greater than the time interval betweensaid output signals, to reset said digital logic means to said initialcondition, said counter circuit being inherently operable to place saiddigital logic means in proper operating condition irrespective of whichscAnner pulse of said series is first received by said scanner pulsecircuit at initial startup of the system.
 11. In a plural station websystem wherein first, second, third and fourth marks are cyclicallyapplied in line on a common channel of a web at respective first,second, third and fourth stations, and wherein scanning of the marks forsensing the registration condition of the web produces first, second,third and fourth scanner pulses in each of successive repeat intervals,the improvement comprising one and only one scanner at said fourthstation for scanning only a single line of marks on the web and operablefor scanning said first, second, third and fourth marks on said commonchannel of the web in a repeat length of the web to produce a series ofscanner pulses in a repeat interval corresponding to scanning of arepeat length of the web, said series including said first, second,third and fourth scanner pulses, a scanner pulse circuit connected withsaid scanner to receive said series of scanner pulses therefrom in eachrepeat interval with the first, second, third and fourth scanner pulsesoccurring in the same order in each repeat interval, said scanner pulsecircuit being responsive to the successive scanner pulses of said seriesin each repeat interval to assume respective different logical switchingconditions with respective first, second, third and fourth logicalswitching conditions corresponding to respective time intervals for theoccurrence of the first, second, third and fourth scanner pulses,respectively, in each repeat interval, and said scanner pulse circuitcomprising a pair of four position selection means each for selectivelyproducing an output signal in response to a scanner pulse occurringselectively during said first, second, third and fourth logicalswitching conditions, said selection means being selectively settable toproduce output signals in response to any two of said series of scannerpulses in each repeat interval, and thereby being operable regardless ofthe order of occurrence of said first, second, third and fourth scannerpulses to generate a pair of output signals in each repeat intervalcorresponding respectively to the time of occurrence of one of saidfirst, second and third scanner pulses and to the time of occurrence ofsaid fourth scanner pulse, with the time interval between said pair ofoutput signals in each repeat interval thereby representing the statusof the register condition at said fourth station in the correspondingrepeat length of the web.
 12. In a plural station web system whereinfirst, second and third marks are cyclically applied in line on a commonchannel of a web at respective first, second and third stations, andwherein scanning of the marks at a fourth station for sensing theregister condition of the web produces at least first, second and thirdscanner pulses in each of successive repeat intervals, the improvementcomprising one and only one scanner at said fourth station for scanningonly a single line of marks on the web and operable for scanning saidfirst, second and third marks on said common channel of the web in arepeat length of the web to produce a series of scanner pulses in arepeat interval corresponding to scanning of a repeat length of the web,said series including at least said first, second and third scannerpulses, a scanner pulse circuit connected with said scanner to receivesaid series of scanner pulses therefrom in each repeat interval with thefirst, second and third scanner pulses occurring in the same order ineach repeat interval, said scanner pulse circuit being responsive to thesuccessive scanner pulses of said series in each repeat interval toassume respective different logical switching conditions with respectivefirst, second and third logical switching conditions corresponding torespective time intervals for the occurrence of the first, second andthird scanner pulses, respectively, in each repeat interval, saidscanner pulsE circuit comprising a multiple position selection means forselectively producing an output signal in response to a scanner pulseoccurring selectively at least during said first, second and thirdlogical switching conditions, said multiple position selection meansbeing selectively settable to produce a first output signal in responseto any of said first, second and third scanner pulses in each repeatinterval, said scanner pulse circuit comprising further means forproducing a second output signal synchronized with a web operation atsaid fourth station, and said scanner pulse circuit including saidmultiple position selection means and said further means being operableregardless of the order of said first, second and third scanner pulsesto generate first and second output signals in each repeat intervalcorresponding respectively to the time of occurrence of one of saidfirst, second and third scanner pulses and to the time of occurrence ofthe web operation at the fourth station, with the time interval betweensaid first and second output signals in each repeat interval therebyrepresenting the status of the register condition at said fourth stationin the corresponding repeat length of the web.
 13. In a plural stationweb system in accordance with claim 12, the improvement furthercomprising a digital logic circuit resettable to an initial logicalswitching condition and being responsive to successive scanner pulsesthereafter received up to a predetermined maximum number of scannerpulses, but being nonresponsive to scanner pulses in excess of saidpredetermined maximum number until reset to said initial logicalswitching condition.
 14. In a plural station web system in accordancewith claim 13, the improvement further comprising a counter circuit forcounting encoder pulses produced by uniform increments of movement ofthe web and operable in response to one of said first and second outputsignals to begin a counting cycle and operable upon reaching apredetermined count which predetermined count is reached after a timeinterval which is greater than the time interval between said first andsecond output signals, to reset said digital logic circuit to saidinitial logical switching condition, said counter circuit beinginherently operable to place said digital logic circuit in propersynchronism with said series of scanner pulses irrespective of whichscanner pulse of the series is first received at initial start up of thesystem.
 15. The method of sensing web registration at a given stationwhich comprises applying marks to a channel on the web at repeatintervals therealong such that a scanner scanning the channel on the webproduces a series of at least three scanner pulses for each repeatinterval including a pair of pulses whose spacing is a function ofregister condition, and selectively responding to the pair of scannerpulses to transmit an output signal as a measure of the registercondition of the web.